May 27, 2020 in in Internet of Things (IoT)
Tag: Mark Tehranipoor
ASiLA: Automated Side-Channel Leakage Analysis: Metrics and Tools
Quantum Blockchain Encrypted AI Video Encoder for Recon (Quantum BEAVER)
Development of Universal Security Theory for Evaluation and Design of Nanoscale Devices
The MURI project involves the investigation of emerging nanoscale devices from a security perspective. More specifically, the project aims to identify, quantify and materialize security properties that are inherent in emerging nano-devices and integration technologies, so that security can be constructed into a system from a fundamental level and not just as an afterthought. For the August 2015-July 2016 time period, the plan is to fulfill the following: 1) Composition heuristics and modeling 2)Security metrics 3) New security primitives.
HARDEN: Hardware-Assisted ML-based Anomaly Detection for Cyber Defense
Due to increasing exploitation of security vulnerabilities and newly surfaced attack vectors in networked and IoT systems, there is an urgent need of employing effective security mechanisms that utilize all available and effective system- level hardware, firmware, and software-centric features to build the protection against malicious cyber-threats. We propose to develop HARDEN, a novel hardware-assisted security framework to provide complementary solutions to existing software-centric mechanisms. Our objective is to utilize existing hardware monitors, also known as hardware performance counters, and on-chip sensors for acquiring security critical runtime information from the architectural and micro-architectural-level of abstraction to intelligently assess the integrity of the system’s functionality and security.
CYAN: Enabling Cyber Defense in Analog and Mixed Signal Domain
The goal is to launch multidisciplinary research (CYAN) in the area of hardware-enabled cybersecurity through innovation and development of new analog and mixed-signal (AMS) domain security. CYAN will focus on addressing a new set of foundational research challenges in AMS domain: 1) Security of analog and mixed-signal functions and devices, and its respective supply chain, 2) Development of information fusion algorithms, predictive analysis and measurement of involuntary analog emissions extracted from both analog and digital domains, including electromagnetic emanation, power side channel, acoustic noise, temperature, etc., and 3) Exploitation of inherent non-linear functions in devices and systems to enable disruptive analog forensic and fingerprinting science and technology (e.g., establishing chaotic based cryptography). CYAN will bring together expertise from analog mixed signal design, fabrication, test, hardware security, devices and circuits, electromagnetics, applied cryptography, machine learning and data analytics to address some of the fundamental challenges and questions relating to securing the design, fabrication, and operation of AMS technologies and analog emissions. Such a holistic approach will field into three main objectives: 1) securing both existing AMS supply chain and future AMS functionality and devices; 2) prediction and countering of the device’s analog side channel behavior and 3) identification and authentication of ICs and systems using the device’s unique analog signatures.
AutoBoM: Intelligent Framework for Automated Bill of Material Generation and Physical Inspection of PCBs
This effort, AutoBoM, will enhance, deploy, transition, and support decision- aiding tools for the AFRL Joint Federated Assurance Center (JFAC) trust laboratory research and development of analysis and design tools to promote trusted systems engineering for IC electronics – from concept analysis through deployment in a Trust facility. This effort will encompass Kanban board, workflow, and knowledge management tool enhancements along with traditional analysis methods such as modeling and simulation and formation methods-based verification.
Solutions for Threat Assessment, Mitigation, and Prevention (STAMP)
This effort, STAMP01, will enhance, deploy, transition, and support decision-aiding tools for the AFRL Joint Federated Assurance Center (JFAC) trust laboratory research and development of analysis and design tools to promote trusted systems engineering for IC electronics – from concept analysis through deployment in a Trust facility. This effort will encompass Kanban board, workflow, and knowledge management tool enhancements along with traditional analysis methods such as modeling and simulation and formation methods- based verification.