Today’s integrated circuits (ICs) and systems are at greater risk during design, fabrication, test, and post-deployment stages than ever before. Semiconductor globalization and outsourcing facilitates intellectual property (IP) piracy, insertion of malicious circuits (i.e., hardware Trojans), and illegal manufacturing of ICs (i.e., overproduction). Further, with advances in the capabilities/automation of failure analysis (FA) tools/software, it is becoming easier to reverse engineer critical IP, extract proprietary secrets, and launch attacks against critical missions and infrastructure. These are serious issues for government, industry, and society. Hardware obfuscation consists of techniques that lock and/or conceal the intent of underlying semiconductor IP in order to hinder these threats. In this webinar, the following topics will be covered: (1) Overview of the IC design flow and threat models; (2) Summary of naïve protection approaches and their limitations; (3) Introduction to hardware obfuscation variants, applications/use cases, popular metrics, and other considerations; and (4) Introduction to non-invasive, invasive, and semi-invasive attacks on hardware obfuscation.