{"id":29191,"date":"2020-07-13T08:58:38","date_gmt":"2020-07-13T13:58:38","guid":{"rendered":"https:\/\/www.eng.ufl.edu\/newengineer\/?p=29191"},"modified":"2025-06-11T12:34:28","modified_gmt":"2025-06-11T17:34:28","slug":"fics-research-receives-7-8m-to-help-make-on-chip-security-pervasive","status":"publish","type":"post","link":"https:\/\/www.eng.ufl.edu\/news\/ece\/fics-research-receives-7-8m-to-help-make-on-chip-security-pervasive\/","title":{"rendered":"FICS Research Receives $7.8M to Help Make On-Chip Security Pervasive"},"content":{"rendered":"

Originally posted on the Department of Electrical and Computer Engineering’s website<\/a><\/em><\/p>\n

Florida Institute for Cybersecurity (FICS) Research<\/a> has announced a collaboration with the Defense Advanced Research Projects Agency (DARPA)<\/a> on a program called Automated Implementation of Secure Silicon (AISS). Leading electronic design automation company Synopsys<\/a> will serve as a prime contractor on the program. The $7.8M grant, part of the DARPA Electronic Resurgence Initiative (ERI), has the broad goal of making scalable on-chip security pervasive throughout industry and military applications.<\/p>\n

As the program description<\/a> outlines,<\/p>\n

\n

The objective of the program is to develop a design tool and IP ecosystem \u2013 including tool vendors, chip developers, IP licensers, and the open source community \u2013 that will allow security to be inexpensively incorporated into chip designs with minimal effort and expertise, ultimately making scalable on-chip security ubiquitous.<\/p>\n<\/blockquote>\n

The Team<\/h2>\n

Seven UF faculty members will be involved in the project, with Dr. Mark Tehranipoor as the lead Principal Investigator. All are members of FICS Research.<\/p>\n\n\n\n\n\n\n\n\n\n\n\n
Faculty Member<\/th>\nAffiliation<\/th>\n<\/tr>\n<\/thead>\n
Mark Tehranipoor<\/a> (Lead PI)<\/td>\nECE<\/td>\n<\/tr>\n
Christophe Bobda<\/a><\/td>\nECE<\/td>\n<\/tr>\n
Farimah Farahmandi<\/a><\/td>\nECE<\/td>\n<\/tr>\n
Domenic Forte<\/a><\/td>\nECE<\/td>\n<\/tr>\n
Yier Jin<\/a><\/td>\nECE<\/td>\n<\/tr>\n
Prabhat Mishra<\/a><\/td>\nCISE<\/td>\n<\/tr>\n
Fahim Rahman<\/td>\nECE<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

The AISS program will be structured as a unique partnership between industry, academia, and government. Synopsys, due to its industry-leading position as an EDA tool\/IP provider, will serve as a prime contractor on the AISS program. FICS Research will serve as the primary academic partner on the Synopsys lead team. Key subcontracting partners with Synopsys include: Arm, Boeing, UltraSoC, UC San Diego, Purdue University, and Texas A&M.<\/p>\n

The Background<\/h2>\n

In June of 2017, the DARPA Microsystems Technology Office (MTO)<\/a> announced a new Electronic Resurgence Initiative (ERI)<\/a> to ensure far-reaching improvements in electronics performance well beyond the limits of traditional scaling. As silicon fabrication continues its move overseas, the need to create a secure, trustworthy chip fabrication supply chain for industry and military use has become more critical than ever.<\/p>\n

DARPA kicked off the ERI with six programs aligned to three thrust areas under the first phase of ERI.<\/p>\n